Nanoelectronic devices are generally fabricated using semiconductor materials and processing for manufacturing the integrated circuits. A complementary metal-oxide-semiconductor (CMOS) field effect transistor is one of the core elements of the integrated circuits. Dimensions and operating voltages of CMOS transistors are continuously reduced, or scaled down, to obtain ever-higher performance and packaging density of the integrated circuits.
One of the problems due to the scaling down of CMOS transistors is that the power consumption keeps increasing. This increase is partly because leakage currents are increasing, e.g. due to short channel effects, and partly because it becomes difficult to further decrease the power supply voltage. As the physical subthreshold swing for CMOS transistors is limited to about 60 mV/decade, a minimal power supply voltage will be needed to switch the transistor from the OFF state to the ON state.
Tunnel field-effect transistors (TFETs) are typically advertised as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), because of their absence of short-channel effects and because of their resulting low off-currents. Another advantage of TFETs is that their theoretical subthreshold swing can be less than 60 mV/dec, the physical limit of conventional MOSFETs, thereby offering the potential of operating at lower supply voltages compared to CMOS transistors.
However, all-silicon TFETs, i.e. with channel and source/drain regions formed in silicon, typically suffer from low on-currents, a drawback related to the large resistance of the tunnel barrier. Heterostructure TFETs, i.e. with different semiconductor materials for the source and at least a part of the channel region, are promising as they combine a high on-current (Ion) due to efficient tunneling at the source-channel region with a low off-current (Ioff) due to inefficient tunneling at the channel-drain region. However for such heterostructure TFET's an average subthreshold swing of less than 60 mV/dec for reasonable Ion/Ioff values has not been achieved.
Theoretical studies show that a tip-shaped source region with a uniform shape in the third dimension such that the shape of the source/channel junction is constant along the width of the channel, is beneficial to improve the subthreshold swing. For example Yue Yang et al. reports in “Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials (SSDM)”, page 798-799 entitled “Drive current enhancement with invasive source in double gate tunneling field-effect transistors” simulation results for a Ge TFET structure comprising an invasive p+ source structure, wherein this p+ region in the middle of the channel extends under the gate. This structure results in an increased tunneling region and as such also in a higher on-current Ion.
P. F. Wang, K. Hilsenbeck, Th. Nirschl, et al. report in Solid-State Electronics 48, p. 2281 (2004) simulation results indicating higher source doping levels and steeper source doping profiles may result in a higher on-current Ion and thus in an improved subthreshold swing for a given off-current Ioff.
However no manufacturable process flow has been disclosed for manufacturing TFET devices having a high on-current Ion, a low leakage current Ioff and a subthreshold swing less than 60 mV/dec.